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NXP Semiconductors
SSL3250A
Photo flash dual LED driver
8.7.1 Addressing
Each SSL3250A in an I 2 C-bus system is activated by sending a valid address to the
device. The address always has to be sent as the first byte after the start condition in the
I 2 C-bus protocol Figure 14 .
MSB
LSB
0
1
1
0
0
0
0
R
W
014aaa288
Fig 14. I 2 C slave address
There is one address byte required since 7-bit addresses are used. The last bit of the
address byte is the read/write-bit and should always be set according to the required
operation. This 7-bit I 2 C address is 0110000b (30h). The 7-bit address plus the R/W bit
create an 8-bit write address of 60h and a read address of 61h.
The second byte sent to the SSL3250A is the subaddress of a specific register.
8.7.2 Data
After the subduers have been sent the data byte(s) are sent. The definition of the data
byte(s) is given in Figure 12 . After each data byte an acknowledge is given and the
subduers is automatically incremented to the next subduers.
A description of the data that can be programmed in the registers is given in the register
map in Section 8.7.3 .
8.7.3 Register map
Table 6. Description of registers
Legend: * default register value
Address
00h
Register
Current control
Bit
7 to 3
Symbol
MAIN_LEVEL
Access
R/W
Value
00000*
Description
OFF (default)
00001
00010
.....
01010
01011
01100
01101
.....
11110
11111
Torch mode, see Section 8.3.3
Torch mode, see Section 8.3.3
.....
Torch mode, see Section 8.3.3
Torch mode, see Section 8.3.3
Flash mode (armed), see Section 8.3.4
Flash mode (armed), see Section 8.3.4
.....
Flash mode (armed), see Section 8.3.4
Flash mode (armed), see Section 8.3.4
2 to 0
IND_LEVEL
R/W
000 *
OFF (default)
SSL3250A_5
001
011
.....
111
indicator ON, 2.5 mA
indicator ON, 5 mA
.....
indicator ON, 17.5 mA
? NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 05 — 16 December 2009
16 of 26
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